Design Verification Engineer
Job description
• Understand the requirements & the functional description of the device to ensure compliance with specifications and error-free functionality.
• Develop a digital circuit with System Verilog/Verilog for a new design or update the functions of an existing design of the circuit.
• Create a detailed block design using System Verilog/Verilog from functional requirement, evolve design specification and perform RTL coding, Lint checking.
• Create and execute a verification plan, including verification testbench/patterns/models/System Verilog Assertions (SVAs).
• Develop SVA properties for assertion, assumption and cover statement.
• Debug failures, fix testbench/model/checker issues, analyze and close coverage.
• Write scripts for automation of flow.
• Work with Analog team members to bring-up Chip/System level verification.
• Participate in post-silicon bring-up, validation and compliance testing.
Job requirements
REQUIREMENT/ QUALIFICATION
• Bachelor’s or Graduate Degree in: Computer Sciences, Electrical, or Computer Engineering.
• Have at least 2-5 years of proven experience
• Experience with Hardware Descriptive Languages (HDL) such as System Verilog, Verilog or VHDL is required.
• Understand digital hardware architectures and logic (State-machines, RAMs, Registers and bus architectures such as SPI or I2C).
• Must be self-driven & proactive with a desire to understand, learn more, do more.
• Excellent analytical and debugging skills with the ability to proactively solve issues is required.
• Verbal and written communication skills in English.
• Good understanding of ASIC design and verification methodologies/flows is a plus.
• Knowledge of verification methodologies such as UVM is a plus.
• The ability to work in a Linux shell environment and Linux scripting (CSH/TCL/Perl/Python) is a plus.
• Experience with silicon debugging which includes logic and Analog Blocks working together is a plus.
BENEFITS:
• Learn & work with world-class design engineers and IC products
• Dynamic, technological, global working environment
• Performance review to adjust salary and title/position.
• 13 months of salary, bonus paid twice a year and many other side benefits such as lunch allowance, healthcare program, annual health-screen, sport activities, gifts on special occasions etc.,
What We Can Offer
Bonus
Healthcare Plan
Training
Job Information
30/10/2024
Experienced (non-manager)
Engineering & Sciences > Electrical/Electronic
Verilog Design, Digital Circuit Design, Linux, Python, Test Script
Electrical/Electronics
Any
Not required
Not shown
Job Locations
Hà Nội, Vietnam
5th Floor, CIC Tower - 219 Trung Kinh Street, Cau Giay District, Hanoi
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